1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, it relates to the prevention of malfunctions caused by noise or the like in a bridge power switching device and which has its control circuit modularized on a single metal substrate.
2. Description of the Background Art
FIG. 12 is a circuit diagram showing a conventional three phase bridge inverter circuit for driving a motor or the like. The inverter circuit includes six power NPN transistors 1 to 6. The transistors 1 and 2 3 and 4, and 5 and 6 are connected like totem poles, respectively and connected in parallel between power source terminals P and N. Between the power source terminals P and N, high voltage which is positive on a terminal P side is applied. A junction of an emitter Of the transistor 1 and a collector of the transistor 2 is connected to a U-phase output terminal U, a junction of an emitter of the transistor 3 and a collector of the transistor 4 is connected to a V-phase output terminal V, and a function of an emitter of the transistor 5 and a collector of the transistor 6 is connected to a W-phase output terminal W. Between the emitters and collectors of the transistors 1 to 6, flywheel diodes 7 to I2 are connected, respectively.
Control circuits 13 to 18 to control turning-ON/OFF of the transistors to 6 are connected to bases of the transistors 1 to 6, respectively. The control circuits 13 to 18 include drivers 25 to 30 which receive control signals applied to input terminals 19 to 24 to produce base drive signals of the transistors 1 to 6. The transistors 1 to 6 turn ON/OFF in response to the control signals inputted to the input terminals 19 to 24. The control circuits 18 to 18 also include protection circuits which detect over current, over voltage, overheating and the like to afford appropriate protection, as required. Furthermore, the control circuits 13, 15 and 17 on an upper arm side also include interface circuits, such as photocouplers and the like, for shifting control signals at a low voltage level applied to the input terminals 19, 21 and 23 to a high voltage level. Each of the control circuits 13 to 18 is composed of an IC, discrete transistors, resistances, capacitors and the like. The control circuits 13, 15 and 17 on the upper arm side have their respective power sources V.sub.UP, V.sub.VP and V.sub.WP, while the control circuits 14, 16 and 18 on a lower arm side have a common power source V.sub.N.
The circuit in FIG. 12 is modularized on a single metal substrate, except for V.sub.UP, V.sub.VP, V.sub.WP and V.sub.N. Boosting voltage of the power source V.sub.N on the lower arm side with a charge pump circuit formed on the metal substrate, the power sources V.sub.UP, V.sub.VP and V.sub.WP on the upper arm side can be made in the module.
FIG. 13 is a sectional view showing a structure of a U-phase part when the circuit in FIG. 12 is formed on a single metal substrate. An insulating layer 32 is formed on an aluminum substrate 31, and a copper pattern 33 similar to a hiring pattern of a printed wiring board is formed thereon. The power transistors 1, 2 and the control circuits 13, 14 are fixed on the copper pattern 33 by soldering or the like. Aluminum wires 34, 35 are base wires, while aluminum wires 36, 37 are emitter wires. The copper patterns 33 are appropriately connected but not shown, and a part of the connections is equivalently shown with connection lines 38. 39. In this way, the U-phase circuitry in FIG. 12 is formed on the single aluminum substrate 31, and connected to external elements through external terminals U, N, P, 19 and 20 formed on the aluminum substrate 31.
FIG. 14 is a sectional view showing an enlarged portion on the upper arm side in FIG. 13. Since the copper pattern 33 and the aluminum substrate 31 are opposed to each other with the insulating layer 32 interposed therebetween, capacitances are formed therebetween. In other words, the copper pattern 33 is capacitively coupled to the aluminum substrate 31. In FIG. 14, a capacitance between a copper pattern 33a to which the output terminal U (i.e., the emitter of the power transistor 1, the collector of the power transistor 2 and a minus side of the power source VUP) is connected and the aluminum substrate 31, and a capacitance between a copper pattern 33b to which the input terminal 19 is connected and the aluminum substrate 31 are represented as C1 and C2, respectively. A capacitance between the copper patterns 33a and 33b is represented as C3. A terminal S connected to the aluminum substrate 31 is shown only for convenience of explanation.
Now, the capacitances C1, C2 and C3 alone should be noticed for discussing what kind of influence noise applied between the terminals U and S exerts upon the terminal 19, and the other capacitances are neglected.
FIG. 15 is an equivalent circuit diagram with the capacitances C1, C2 and C3. Since the copper pattern 33a is larger than the copper pattern 33b in area, the capacitance C1 is larger than the capacitances C2. The capacitance C3 is very small compared with the capacitances C1 and C2 because it is a capacitance between the patterns. Thus, the following relations are obtained. EQU C2&gt;C2&gt;&gt;C3 (1)
Now assume that dV/dt (U) is applied to the terminal U with respect to the terminal S as noise. At this time, noise dV/dt (19) applied to the terminal 19 with respect to the terminal U can be expressed by an equation as follows: ##EQU1##
From the relation of the equation (1), the following formula is obtained: ##EQU2##
Thus, noise arises in the terminal 19 with respect to the terminal U to the same extent as in the terminal U with respect to the terminal S. As will be apparent from FIG. 12, the terminal U is an output terminal connected to the output electrode (emitter) of the power transistor 1 and applies reference potential of the control circuit 13 of the power transistor 1. On the other hand, the terminal 19 is an input terminal of the control circuit 13. There is the problem that malfunctions are caused in the control circuit 13 because noise arises in the terminal 19 applying a control input for the control circuit 13, with respect to the terminal U applying reference potential of the control circuit 13. Such noise arises not only in the input terminal 19 but in various signal paths in the control circuit 13 and causes malfunctions, for example, erroneously exercising protection functions (protecting from over current, over voltage and the like). Such a disadvantage is also caused when noise is applied to the terminals V, W, p and N (i.e., current paths in the power transistors 1 to 6) with respect to the aluminum substrate 31.